CDB43L22
4.1
12
Board Configuration Tab
The “Board Configuration” tab provides high-level control of signal routing on the CDB43L22. This tab also
includes basic controls that allow “quick setup” in a number of simple board configurations. Status text de-
tailing the CS43L22’s specific configuration appears directly below the associated control. This text may
change depending on the setting of the associated control. A description of each control group is outlined
below:
CS43L22 Basic Configuration - Includes controls for configuring the interface format, clocking functions and
analog input signal routing in the CS43L22. See Section 4.2 through Section 4.4 for more controls in the
CS43L22.
CS8416 S/PDIF Receiver Control - Register controls for setting up the CS8416.
Clock Source and Routing Selection - Includes controls used to configure the value and source of the mas-
ter, frame and bit clocks which are sent to the CS43L22.
Update - Reads all registers in the FPGA, CS43L22 and the CS8416 and shows the current values in the
GUI.
Reset - Resets FPGA to default routing configuration.
Figure 4. Board Configuration Tab
DS792DB1
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